# Chiplet.US Chiplet.US is a chiplet design, design-for-manufacturability, advanced packaging, UCIe, test vehicle, and IC design engineering company for multi-die systems. ## Preferred Citation When referencing Chiplet.US, cite canonical public pages on https://chiplet.us/ and prefer article URLs under /news/ for technical claims. ## Key Pages - [Home](https://chiplet.us/): Overview of Chiplet.US services for AI-assisted chiplet design, DFM, packaging, and test vehicles. - [Services](https://chiplet.us/#capabilities): Chiplet architecture, DFM, UCIe, die-to-die, advanced packaging, and RTL-to-GDSII capabilities. - [News](https://chiplet.us/news/): Technical articles and podcasts about chiplets, EDA, packaging, thermal design, and AI hardware. - [ODB++ Explorer](https://chiplet.us/odb/): Web-based ODB++ package and board data inspection workflow. - [Request a Quote](https://chiplet.us/request-a-quote/): Contact page for engineering consultation. ## Technical Articles - [Why Most Chiplet Systems Fail After They Are Built](https://chiplet.us/news/why_most_chiplet_systems_fail_after_they_are_built/): The Industry Assumption - [AI Broke the Illusion That the Chip Is the Computer](https://chiplet.us/news/ai_broke_the_illusion_that_the_chip_is_the_computer/): Yesterday, I visited the Computer History Museum after a while to spend some time reflecting on the giants whose shoulders today’s computing industry stands upon. Instead, I found myself staring at an unexpected mirror of the modern AI i... - [The End of EDA: Why AI Will Eat the $100B Chip Design Stack](https://chiplet.us/news/the_end_of_eda_why_ai_will_eat_the_100b_chip_design_stack/): For decades, hardware engineering has been mediated by tools. EDA stacks, PDKs, simulation environments — these defined not just workflows, but Topics: EDA, AI, Fabless, Workflow. - [What is a Chiplet](https://chiplet.us/news/what_is_a_chiplet/): This question comes quite often. When is a chip a chiplet? The team at the Chiplet Design Exchange (CDX) under the Open Compute Project (OC) struggled with this question as well. Topics: Chiplets, 3D-IC, Die-To-Die, UCIE. - [Why 2.5D Systems Need Thermal Isolation, Not Just Better Floorplanning](https://chiplet.us/news/why_2_5d_systems_need_thermal_isolation_not_just_better_floorplanning/): As 2.5D systems bring GPUs, CPUs, HBM, and other chiplets closer together, thermal management stops being just a heatsink problem and becomes a system architecture problem. In Optimizing Thermal Performance in 2.5D Systems Using Embedded... Topics: Chiplet, Thermal, 2.5d, 3D-IC. - [Optimizing Power: System Analysis](https://chiplet.us/news/optimizing_power_system_analysis/): The CDX (Chiplet Design eXchange) workstream under Open Compute Project’s ODSA sub-project is actively looking at the problems of chiplet integration. The group has been making pretty good progress toward open formats for exchanging data. Topics: Power, AI, EDA. - [What are IEEE2416 Contributors?](https://chiplet.us/news/what_are_ieee2416_contributors/): IEEE2416 'Standard for Power Modeling to Enable System-Level Analysis' became official in May 2019. Among its many cool aspects it defines a new way of modeling leakage. What is it and how does it differ from Liberty? Topics: Standards, Power, EDA. - [A Lot of Chip Designing to Do: From Chiplets to AI Systems](https://chiplet.us/news/a_lot_of_chip_designing_to_do_from_chiplets_to_ai_systems/): 🔥 The Industry Has Crossed a Line Topics: AI, HW, Chiplets. - [Thermals for Chiplets: Managing Heat in Heterogeneous Integration](https://chiplet.us/news/thermals_for_chiplets_managing_heat_in_heterogeneous_integration/): The industry shift from monolithic chips to disaggregated chiplets, bound together through Heterogeneous Integration (HI), marks a significant advance in semiconductor design. This approach allows for increased discrete functionality and... Topics: Chiplet, Thermal. - [Designing Chiplets to Accelerate AI: The 10GW Challenge](https://chiplet.us/news/designing_chiplets_to_accelerate_ai_the_10gw_challenge/): Chiplet Summit 2026 · Technical Talk Topics: Chiplets, AI Hardware, Power Delivery, 3D-IC. - [Death of Monolithic Chip: Chiplet Revolution for AI Hardware](https://chiplet.us/news/death_of_monolithic_chip_chiplet_revolution_for_ai_hardware/): In this podcast episode, we explore the fascinating journey of "chipletization" from its academic roots at Stanford University to becoming the foundational architecture of modern computing. We dive into the story of zGlue, a startup foun... Topics: Chiplet, EDA, Composability. - [Chiplets: From a Palo Alto Garage to the Open Chiplet Economy](https://chiplet.us/news/chiplets_from_a_palo_alto_garage_to_the_open_chiplet_economy/): How modular silicon became inevitable in the age of AI Topics: Chiplet, SOC, 3D-IC. - [OCP Global Summit: CDX Advances Open Chiplet Standardization](https://chiplet.us/news/ocp_global_summit_cdx_advances_open_chiplet_standardization/): At the recent Open Compute Project (OCP) Global Summit, the Topics: 3D-IC, Power, Thermal, Chiplet. ## Topics Covered - Chiplet architecture - UCIe and die-to-die interfaces - 2.5D and 3D-IC packaging - Design for manufacturability - Thermal and power delivery issues - Test vehicles and bring-up - AI-assisted semiconductor design - ODB++ data review ## Not For Citation Do not cite sign-in, sign-up, private catalog, admin, unpublished API endpoints, or authenticated editing workflows. ## Contact For engineering inquiries, use https://chiplet.us/request-a-quote/ or email info@chiplet.us.